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ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 9 Issue 1, February 2013

A Novel Algorithm for Fast Synthesis of DNA Probes on Microarrays
S. Srinivasan, V. Kamakoti, A. Bhattacharya
Article No.: 1
DOI: 10.1145/2422094.2422095

DNA microarrays are used extensively for biochemical analysis that includes genomics and drug discovery. This increased usage demands large microarrays, thus complicating their computer aided design (CAD) and manufacturing methodologies. One such...

Module-Based Synthesis of Digital Microfluidic Biochips with Droplet-Aware Operation Execution
Elena Maftei, Paul Pop, Jan Madsen
Article No.: 2
DOI: 10.1145/2422094.2422096

Microfluidic biochips represent an alternative to conventional biochemical analyzers. A digital biochip manipulates liquids not as continuous flow, but as discrete droplets on a two-dimensional array of electrodes. Several electrodes are...

Brownian Circuits: Fundamentals
Ferdinand Peper, Jia Lee, Josep Carmona, Jordi Cortadella, Kenichi Morita
Article No.: 3
DOI: 10.1145/2422094.2422097

Random fluctuations will be a major factor interfering with the operation of nanometer scale electronic devices. This article presents circuit architectures that can exploit such fluctuations, if signals have a particle-like (discrete,...

Design and Analysis of a Robust Carbon Nanotube-Based Asynchronous Primitive Circuit
Behnam Ghavami, Mohsen Raji, Hossein Pedram, Mehdi B. Tahoori
Article No.: 4
DOI: 10.1145/2422094.2422098

Carbon Nanotube Field Effect Transistors (CNFETs) show great promise as extensions to silicon CMOS. However, CNFET-based circuits will face great fabrication challenges that will translate into important parameter variations and decreased...

A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays
Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan
Article No.: 5
DOI: 10.1145/2422094.2422099

Reducing power consumption has become one of the primary challenges in chip design, and therefore significant efforts are being devoted to find holistic solutions on power reduction from the device level up to the system level. Among a plethora of...

Thermal Characterization of Test Techniques for FinFET and 3D Integrated Circuits
Aoxiang Tang, Niraj K. Jha
Article No.: 6
DOI: 10.1145/2422094.2422100

Power consumption has become a very important consideration during integrated circuit (IC) design and test. During test, it can far exceed the values reached during normal operation and, thus, lead to temperatures above the allowed threshold....

Hybrid Redundancy for Defect Tolerance in Molecular Crossbar Memory
Shuo Wang, Jianwei Dai, Lei Wang
Article No.: 7
DOI: 10.1145/2422094.2422101

Nano/molecular technologies have emerged as the potential fabrics for building future integrated systems. However, due to the imperfect fabrication process, these extremely scaled devices are vulnerable to a large number of defects and transient...

Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation
Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, C. Andras Moritz
Article No.: 8
DOI: 10.1145/2422094.2422102

Emerging nanodevice-based architectures will be impacted by parameter variation in conjunction with high defect rates. Variations in key physical parameters are caused by manufacturing imprecision as well as fundamental atomic scale randomness. In...

Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array
Jiale Liang, Stanley Yeh, S. Simon Wong, H.-S. Philip Wong
Article No.: 9
DOI: 10.1145/2422094.2422103

The impact of wordline/bitline metal wire scaling on the write/read performance, energy consumption, speed, and reliability of the cross-point memory array is quantitatively studied for technology nodes down to single-digit nm. The impending...