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ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special issue on memory technologies, Volume 9 Issue 2, May 2013

Introduction to the special issue on memory technologies
Bipul C. Paul, Arijit Raychowdhury
Article No.: 10
DOI: 10.1145/2463585.2463586

Memristive devices in computing system: Promises and challenges
J. Joshua Yang, R. Stanley Williams
Article No.: 11
DOI: 10.1145/2463585.2463587

Memristive devices with a simple structure are not only very small but also very versatile, which makes them an ideal candidate used for the next generation computing system in the post-Si era. The working mechanism of the devices and a family of...

Nanoscale electronic synapses using phase change devices
Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, Matthew Breitwisch, Geoffrey W. Burr, Roger Cheek, Kailash Gopalakrishnan, Simone Raoux, Charles T. Rettner, Alvaro Padilla, Alex G. Schrott, Rohit S. Shenoy, Bülent N. Kurdi, Chung H. Lam, Dharmendra S. Modha
Article No.: 12
DOI: 10.1145/2463585.2463588

The memory capacity, computational power, communication bandwidth, energy consumption, and physical size of the brain all tend to scale with the number of synapses, which outnumber neurons by a factor of 10,000. Although progress in cortical...

Spin-transfer torque magnetic random access memory (STT-MRAM)
Dmytro Apalkov, Alexey Khvalkovskiy, Steven Watts, Vladimir Nikitin, Xueti Tang, Daniel Lottis, Kiseok Moon, Xiao Luo, Eugene Chen, Adrian Ong, Alexander Driskill-Smith, Mohamad Krounbi
Article No.: 13
DOI: 10.1145/2463585.2463589

Spin-transfer torque magnetic random access memory (STT-MRAM) is a novel, magnetic memory technology that leverages the base platform established by an existing 100+nm node memory product called MRAM to enable a scalable nonvolatile memory...

Dual pillar spin-transfer torque MRAMs for low power applications
Niladri N. Mojumder, Xuanyao Fong, Charles Augustine, Sumeet K. Gupta, Sri Harsha Choday, Kaushik Roy
Article No.: 14
DOI: 10.1145/2463585.2463590

Electron-spin based data storage for on-chip memories has the potential for ultra-high density, low power consumption, very high endurance, and reasonably low read/write latency. In this article, we discuss the design challenges associated with...

Electrothermal analysis of spin-transfer-torque random access memory arrays
Subho Chatterjee, Sayeef Salahuddin, Satish Kumar, Saibal Mukhopadhyay
Article No.: 15
DOI: 10.1145/2463585.2463591

Spin Transfer Torque RAM (STTRAM) is a promising candidate for fast, scalable, high-density, nonvolatile memory in nanometer technology. However, relatively high write current density and small volume of the memory device indicate the possibility...

On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations
Yiran Chen, Weng-Fai Wong, Hai Li, Cheng-Kok Koh, Yaojun Zhang, Wujie Wen
Article No.: 16
DOI: 10.1145/2463585.2463592

It has been predicted that a processor's caches could occupy as much as 90% of chip area a few technology nodes from the current ones. In this article, we investigate the use of multilevel spin-transfer torque RAM (STT-RAM) cells in the...