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Introduction to nanophotonic communication technology integration
Li Shang, Qianfan Xu
Article No.: 5
Large-scale integrated photonics for high-performance interconnects
Raymond G. Beausoleil
Article No.: 6
Moore's Law has set great expectations that the performance of information technology will improve exponentially until at least the end of this decade. Although the physics of silicon transistors alone might allow these expectations to be met, the...
Photonic network-on-chip architectures using multilayer deposited silicon materials for high-performance chip multiprocessors
Aleksandr Biberman, Kyle Preston, Gilbert Hendry, Nicolás Sherwood-Droz, Johnnie Chan, Jacob S. Levy, Michal Lipson, Keren Bergman
Article No.: 7
Integrated photonics has been slated as a revolutionary technology with the potential to mitigate the many challenges associated with on- and off-chip electrical interconnection networks. To date, all proposed chip-scale photonic interconnects...
Iris: A hybrid nanophotonic network design for high-performance and low-power on-chip communication
Zheng Li, Moustafa Mohamed, Xi Chen, Hongyu Zhou, Alan Mickelson, Li Shang, Manish Vachharajani
Article No.: 8
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfers, limits the power efficiency and performance scalability of many-core...
A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors
Mark J. Cianchetti, David H. Albonesi
Article No.: 9
Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable chip performance within a given power envelope. While CMOS-compatible...