enter search term and/or author name
A Reconfigurable PLA Architecture for Nanomagnet Logic
Michael Crocker, Michael Niemier, X. Sharon Hu
Article No.: 1
In order to continue the performance and scaling trends that we have come to expect from Moore’s Law, many emergent computational models, devices, and technologies are actively being studied to either replace or augment CMOS technology....
From Transistors to NEMS: Highly Efficient Power-Gating of CMOS Circuits
Michael B. Henry, Leyla Nazhandali
Article No.: 2
A rapidly growing class of battery constrained electronic applications are those with very long sleep periods, such as structural health monitoring systems, biomedical implants, and wireless border security cameras. The traditional method for...
Modeling and Designing for Accuracy and Energy Efficiency in Wireless Electroencephalography Systems
Jeremy R. Tolbert, Pratik Kabali, Simeranjit Brar, Saibal Mukhopadhyay
Article No.: 3
Remote wireless monitoring of physiological signals has emerged as a key enabler for biotelemetry and can significantly improve the delivery of healthcare. Improving the energy efficiency and battery lifetime of the monitoring units without...
Skew Dependence of Nanophotonic Devices Based on Optical Near-Field Interactions
Makoto Naruse, Ferdinand Peper, Kouichi Akahane, Naokatsu Yamamoto, Tadashi Kawazoe, Naoya Tate, Motoichi Ohtsu
Article No.: 4
We examine the timing dependence of nanophotonic devices based on optical excitation transfer via optical near-field interactions at the nanometer scale. We theoretically analyze the dynamic behavior of a two-input nanophotonic switch composed of...
A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip
Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang, Weichen Liu, Mahdi Nikdast
Article No.: 5
Networks-on-chip (NoCs) are emerging as a key on-chip communication architecture for multiprocessor systems-on-chip (MPSoCs). Optical communication technologies are introduced to NoCs in order to empower ultra-high bandwidth with low power...
Design Considerations for Multilevel CMOS/Nano Memristive Memory
H. Manem, J. Rajendran, G. S. Rose
Article No.: 6
With technology migration into nano and molecular scales several hybrid CMOS/nano logic and memory architectures have been proposed that aim to achieve high device density with low power consumption. The discovery of the memristor has further...